![Appendix C: Tutorial on the Use of Verilog HDL to Simulate a Finite-State Machine Design - FSM-based Digital Design using Verilog HDL [Book]](https://www.oreilly.com/api/v2/epubs/9780470060704/files/images/appc-f001.jpg "Appendix C: Tutorial on the Use of Verilog HDL to Simulate a Finite-State Machine Design - FSM-based Digital Design using Verilog HDL [Book]")
Appendix C: Tutorial on the Use of Verilog HDL to Simulate a Finite-State Machine Design - FSM-based Digital Design using Verilog HDL [Book]
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